Intended Purpose and Features
EasyJTAG Box is a professional JTAG programmer allowing you to work with devices
(single or united into common chain) through JTAG interface.The main intended purpose of
EasyJTAG Box is repairing dead boots of the devices (cell phones, PDAs, modems, etc.) or
these devices recovery until they become fully operational.EasyJTAG Software is Windows
application for EasyJTAG Box providing fast and easy interface for devices recovery.
  Description of “Flasher Mode” Tab Elements of EasyJTAG Software Window  

1. Device manufacturer selection field.
   
2. Device model selection field.
   
3. Device memory chip selection ( for devices with 2 or more memory chips onboard)
   
4. Data transfer rate (TCK frequency) selection field.
   
5. Activity log (log).
   
6. “Connect” button. Used to set connection with the attached device according to the indicated parameters. Information on the connected device is shown in the activity log. Set connection before starting any operations!
   
7. “Disconnect” button is used to disconnect the attached device.
   
8. “Stop Operation” button is used to break current read or write operation.
   
9. “Read Target Flash” button. When clicked, (Selected by option 3 ) flash chip dump of the connected device is read.
   
10. “Read Target RAM” button. When clicked, content of ARM core memory is read in halted state.
    
11. “Write” button. When clicked, the selected file dump is written into flash chip of the connected device. Additional settings may apply by controls 16,17,18 and 13.
    
12. “Erase button”. When clicked, area of the flash chip indicated in the fields 16 and 17, is erased.
    
13. Options used to enable write ECC date from file or calculate automatically. ( Writing ECC from flash file are recommended to preserve EFS critical data)
    
14. Hardcoded presets for reading chip areas.
    
15. Manual read parameters ( start address and dump length ).
    
16. Hardcoded presets for writing chip areas.
    
17. Manual writeparameters ( start address and write length ).
    
18. “Bad block options” combo is used to config flasher reaction if bad block if detected. There are 3 options: Cancel, Ignore and Skip. Default policy are cancel – operation would be stop on bad block. Use Ignore option if you write native device backup and Skip if trying to write “alien” flash to device.
    
19. Flash file selection field , can be disabled in some configurations.
    
20. Easy “One Button” Repair Tab.
    
21. Advanced Flasher Tab.
    
22. JTAG Pinout finder Tab.
    
23. Box Maintenance Field.
    
24. Custom Command Interface.
    
25. Help Button.
    
26. Current status ( Ready / Busy / Operation Pending or Error ).
    
27. Current adress of operation.
    
28. Current CPU JTAG ID.
    
29. Box Serial Number.
    
30. Z3X Card Serial Number.
    
31. Box And Card firmwares.
    
32. Current TCK Speed.
    
33. Current VREF Voltage.
    

    EASY-JTAG firmware supports following features at the moment:

• ARM7/ARM9/ARM11 PXA3xx, PXA270, Cortex-A8, OMAP850, Cortex-A9 Dual cores support;
  
• Multiple devices on JTAG chain are supported, thus TAP number selection is available;
  
• Any custom voltage level selection from range ~1.8V to 3.8V
  
• TCK/Adaptive clocking selection
  
• Halt core (NRST is not changed)
  
• Reset core (NRST is applied before halt)
  
• Direct Read and Write memory (by 8/16/32-bit mode or bulk transfers)
  
• Access to the control registers of ARM core (coprocessor 15)
  
• Program code breakpoints
  
• Run Halt Restart core
  
• 19 Pins Hardware Accselerated unique finder feature offered only by Easy- JTAG
  

Currently supported memory controllers are:

• OneNAND Memory (connected directly to the MCU’s address space);
  
• CFI Compliant NOR Memory with CFI Command sets 0×0001, 0×0002, 0×0200 and 0×0003;
  
• NAND Controller in MSM6250, MSM6250A;
  
• NAND Controller in QSC6055, QSC6085, QSC6240, QSC6270;
  
• NAND Controller in MSM6245, MSM6246, MSM6270, MSM6275, MSM6280, MSM6280A, MSM6281, MSM6290, MSM6800A, MSM6801A;
  
• NAND Controller and OneNAND Controller in MSM7225, MSM7227, MSM7625, MSM7627;
  
• NAND Controller in MSM7200, MSM7200A, MSM7201A, MSM7500, MSM7500A, MSM7501A, MSM7600;
  
• NAND Controller in QSD8250, QSD8650;
  
• eMMC Controller #2 in MSM7230, MSM8255, MSM8255T;
  
• eMMC Controller #0 in S5PC110;
  
• eMMC Controller #0 in S5PC210;
  

Currently supported chipsets and cores for JTAG I/O operations:

• Generic ARM Cores: ARM7, ARM9 (ARM920, ARM926, ARM946), ARM11, CORTEX-A8,CORTEX-A9;
  
• Qualcomm QSC Family: QSC1100, QSC1110, QSC6010, QSC6020, QSC6030, QSC6055, QSC6085, QSC6240, QSC6270;
  
• Qualcomm MSM Family: MSM6000, MSM6150, MSM6245, MSM6246, MSM6250, MSM6250A, MSM6260, MSM6275, MSM6280, MSM6280A, MSM6281, MSM6800A, MSM6801A, MSM6290, MSM7225, MSM7227, MSM7625, MSM7627, MSM7230, MSM8255, MSM8255T, MSM8260;
  
• Qualcomm QSD Family: QSD8250, QSD8650;
  
• Marvell/XScale Family: PXA270, PXA271, PXA272, PXA310, PXA312, PXA320.
  
• Samsung Processors: S5P6422, S5PV310,S5PC110,S5PC210